The present invention relates to packaged microelectronic components and methods for assembling the same. In particular, aspects of the invention relate to microelectronic component lead frame structures and to stacked microelectronic component assemblies.
Semiconductor chips or dies are typically encapsulated in a package that protects the chips from the surrounding environment. The packages typically include leads or other connection points that allow the encapsulated chip to be electrically coupled to another microelectronic component. Leaded packages include a semiconductor chip bonded to a lead frame either seated on a die paddle or directly to the leads, e.g., in a leads-over-chip attachment. The contacts pads on the semiconductor die are then electrically connected to the chip, e.g., by wire bonding. The connected lead frame and chip may then be encapsulated in a mold compound to complete the microelectronic component package. In most common applications, the leads extend out from the mold compound, allowing the chip to be electrically accessed. Typically, the leads extend laterally outwardly in a flat array that is part of a lead frame. This lead frame may be trimmed and formed into a desired configuration.
One increasingly popular technique for maximizing device density on a substrate is to stack microelectronic devices on top of one another. Stacking just one device on top of a lower device can effectively double the circuitry within a given footprint; stacking additional devices can further increase the circuit density. In one approach, individual microelectronic components, e.g., individual semiconductor dies, are separately packaged. These separate packages are then stacked atop one another to form a multi-package assembly. Such an approach is illustrated in PCT International Publication Number WO99/65062, the entirety of which is incorporated herein by reference.
In an alternative approach, multiple microelectronic components are assembled in a single package. FIGS. 1-5 schematically illustrate a thin small outline package (TSOP) 10 that includes an upper microelectronic component 20 and a lower microelectronic component 30. Typically, these microelectronic components are semiconductor dies. Leads 42 of an upper lead frame 40 may be physically attached to the upper microelectronic component 20 via an adhesive, such as a conventional lead-on-chip tape. The inner lengths 44 of some or all of the leads 42 are electrically coupled to the upper microelectronic component 20 by individual wire bonds 24. Similarly, leads 52 of a lower lead frame 50 are physically attached to the lower microelectronic component 30 by an adhesive 32. Wire bonds 34 electrically connect the inner lengths 54 of selected leads 52 to the lower microelectronic component 30. The upper microelectronic component 20 and the lower microelectronic component 30 may be attached in a variety of ways, such as by a die attach adhesive 25.
The microelectronic components 20 and 30 and the inner lengths 44 and 54 of the leads 42 and 52, respectively, may be encapsulated in a mold compound 12. An outer length 46 of each lead 42 of the upper lead frame 40 extends outwardly beyond a periphery 14 of the mold compound 12. Similarly, an outer length 56 of each lead 52 of the lower lead frame 50 extends outwardly beyond the periphery 14 of the mold compound 12. The outer lengths 56 of the lower leads 52 may be shaped for connection to a substrate or another microelectronic component. The TSOP 10 shown in FIGS. 1-5 employs lower leads 52 with generally S-shaped outer lengths, which is commonplace for TSOPs; a wide variety of other shapes are known in the art for use in different applications.
The upper leads 42 of the TSOP 10 are appreciably shorter than the lower leads 52. In this design, the upper leads 42 are too short to directly contact another component, such as a substrate. Instead, the lower leads 52 are coupled to the substrate (not shown) and the upper leads 42 communicate with the substrate via an electrical connection to the lower leads 52. As shown in FIG. 3, the leads 42 and 52 may be electrically connected using a conventional solder dip process. In such a process, the outer lengths 46 and 56 of the leads 42 and 52, respectively, are dipped in a bath of molten solder. As shown in FIG. 3, to promote an optimal electrical connection between the upper lead 42 and the lower lead 52, the solder may cover the entire outer length 46 of the upper lead 42. Unfortunately, current designs tend to require an undue amount of solder to completely cover the outer length 46 of the upper lead 42 and to establish consistently reliable electrical connections between the upper lead 42 and lower lead 52 of each vertically superimposed pair of leads (only one pair being shown in FIG. 3).
One factor that may contribute to the need for an excess of solder is the width of the dam bar used in manufacturing the upper leads 42. FIGS. 4 and 5 schematically illustrate aspects of this manufacturing process. As shown in FIG. 4, the lead frame 40 initially includes a dam bar 48 that connects the outer lengths 46. In particular, a dam bar element 49 is connected to two adjacent leads 42 and spans the space between the outer lengths 46 of the adjacent leads 42. The dam bar 48 (which may be considered as comprising the dam bar elements 49 and an outer tip portion of each of the leads 42) both physically supports the outer lengths 46 of the leads 42 during handling and helps block or dam the flow of the mold compound 12 during the molding operation. The dam bar elements 49 also electrically short adjacent leads 42 to one another and must be removed to electrically isolate the upper leads 42 from one another. FIG. 5 shows the same package 10 after the dam bar 48 has been trimmed to remove the dam bar elements 49. Once the dam bar 48 has been trimmed into the shape shown in FIG. 5, the outer lengths 56 of the lower leads 52 may be formed into the desired shape, e.g., the S shape shown in FIGS. 2 and 3.
Bending the outer lengths 56 of the lower leads 52 will tend to leave a gap 62 between the lower lead 52 and the upper lead 42, as shown in FIG. 2. When the leads 42 and 52 are solder-dipped, the solder 60 is expected to fill this gap 62. The cantilevered distance of the outer length 46 extending outwardly above the gap 62 is attributable in large part to the width W of the dam bar 48. Reducing the width W of the dam bar 48 could reduce the size of the gap 62 and the amount of solder 60 necessary to fill the gap 62. However, making the dam bar 48 too thin could sacrifice the requisite structural integrity of the lead frame 40, making the lead frame 40 less able to withstand the rigors of normal handling during manufacture. Making the dam bar 48 thinner may also compromise the ability of the dam bar 48 to block the flow of mold compound during the encapsulation process.